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269 lines
11 KiB
C
269 lines
11 KiB
C
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* CPU data header for bpf.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright (C) 1996-2023 Free Software Foundation, Inc.
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This file is part of the GNU Binutils and/or GDB, the GNU debugger.
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This file is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#ifndef BPF_CPU_H
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#define BPF_CPU_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define CGEN_ARCH bpf
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/* Given symbol S, return bpf_cgen_<S>. */
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#define CGEN_SYM(s) bpf##_cgen_##s
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/* Selected cpu families. */
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#define HAVE_CPU_BPFBF
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#define CGEN_INSN_LSB0_P 1
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/* Minimum size of any insn (in bytes). */
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#define CGEN_MIN_INSN_SIZE 8
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/* Maximum size of any insn (in bytes). */
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#define CGEN_MAX_INSN_SIZE 16
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#define CGEN_INT_INSN_P 0
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/* Maximum number of syntax elements in an instruction. */
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#define CGEN_ACTUAL_MAX_SYNTAX_ELEMENTS 16
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/* CGEN_MNEMONIC_OPERANDS is defined if mnemonics have operands.
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e.g. In "b,a foo" the ",a" is an operand. If mnemonics have operands
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we can't hash on everything up to the space. */
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#define CGEN_MNEMONIC_OPERANDS
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/* Maximum number of fields in an instruction. */
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#define CGEN_ACTUAL_MAX_IFMT_OPERANDS 7
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/* Enums. */
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/* Enum declaration for eBPF instruction codes. */
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typedef enum insn_op_code_alu {
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OP_CODE_ADD = 0, OP_CODE_SUB = 1, OP_CODE_MUL = 2, OP_CODE_DIV = 3
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, OP_CODE_OR = 4, OP_CODE_AND = 5, OP_CODE_LSH = 6, OP_CODE_RSH = 7
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, OP_CODE_NEG = 8, OP_CODE_MOD = 9, OP_CODE_XOR = 10, OP_CODE_MOV = 11
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, OP_CODE_ARSH = 12, OP_CODE_END = 13, OP_CODE_SDIV = 14, OP_CODE_SMOD = 15
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, OP_CODE_JA = 0, OP_CODE_JEQ = 1, OP_CODE_JGT = 2, OP_CODE_JGE = 3
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, OP_CODE_JSET = 4, OP_CODE_JNE = 5, OP_CODE_JSGT = 6, OP_CODE_JSGE = 7
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, OP_CODE_CALL = 8, OP_CODE_EXIT = 9, OP_CODE_JLT = 10, OP_CODE_JLE = 11
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, OP_CODE_JSLT = 12, OP_CODE_JSLE = 13
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} INSN_OP_CODE_ALU;
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/* Enum declaration for eBPF instruction source. */
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typedef enum insn_op_src {
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OP_SRC_K, OP_SRC_X
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} INSN_OP_SRC;
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/* Enum declaration for eBPF instruction class. */
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typedef enum insn_op_class {
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OP_CLASS_LD, OP_CLASS_LDX, OP_CLASS_ST, OP_CLASS_STX
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, OP_CLASS_ALU, OP_CLASS_JMP, OP_CLASS_JMP32, OP_CLASS_ALU64
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} INSN_OP_CLASS;
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/* Enum declaration for eBPF load/store instruction modes. */
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typedef enum insn_op_mode {
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OP_MODE_IMM = 0, OP_MODE_ABS = 1, OP_MODE_IND = 2, OP_MODE_MEM = 3
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, OP_MODE_XADD = 6
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} INSN_OP_MODE;
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/* Enum declaration for eBPF load/store instruction sizes. */
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typedef enum insn_op_size {
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OP_SIZE_W, OP_SIZE_H, OP_SIZE_B, OP_SIZE_DW
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} INSN_OP_SIZE;
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/* Attributes. */
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/* Enum declaration for machine type selection. */
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typedef enum mach_attr {
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MACH_BASE, MACH_BPF, MACH_XBPF, MACH_MAX
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} MACH_ATTR;
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/* Enum declaration for instruction set selection. */
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typedef enum isa_attr {
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ISA_EBPFLE, ISA_EBPFBE, ISA_XBPFLE, ISA_XBPFBE
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, ISA_MAX
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} ISA_ATTR;
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/* Number of architecture variants. */
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#define MAX_ISAS ((int) ISA_MAX)
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#define MAX_MACHS ((int) MACH_MAX)
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/* Ifield support. */
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/* Ifield attribute indices. */
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/* Enum declaration for cgen_ifld attrs. */
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typedef enum cgen_ifld_attr {
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CGEN_IFLD_VIRTUAL, CGEN_IFLD_PCREL_ADDR, CGEN_IFLD_ABS_ADDR, CGEN_IFLD_RESERVED
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, CGEN_IFLD_SIGN_OPT, CGEN_IFLD_SIGNED, CGEN_IFLD_END_BOOLS, CGEN_IFLD_START_NBOOLS = 31
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, CGEN_IFLD_MACH, CGEN_IFLD_ISA, CGEN_IFLD_END_NBOOLS
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} CGEN_IFLD_ATTR;
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/* Number of non-boolean elements in cgen_ifld_attr. */
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#define CGEN_IFLD_NBOOL_ATTRS (CGEN_IFLD_END_NBOOLS - CGEN_IFLD_START_NBOOLS - 1)
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/* cgen_ifld attribute accessor macros. */
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#define CGEN_ATTR_CGEN_IFLD_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_IFLD_MACH-CGEN_IFLD_START_NBOOLS-1].nonbitset)
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#define CGEN_ATTR_CGEN_IFLD_ISA_VALUE(attrs) ((attrs)->nonbool[CGEN_IFLD_ISA-CGEN_IFLD_START_NBOOLS-1].bitset)
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#define CGEN_ATTR_CGEN_IFLD_VIRTUAL_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_VIRTUAL)) != 0)
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#define CGEN_ATTR_CGEN_IFLD_PCREL_ADDR_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_PCREL_ADDR)) != 0)
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#define CGEN_ATTR_CGEN_IFLD_ABS_ADDR_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_ABS_ADDR)) != 0)
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#define CGEN_ATTR_CGEN_IFLD_RESERVED_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_RESERVED)) != 0)
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#define CGEN_ATTR_CGEN_IFLD_SIGN_OPT_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_SIGN_OPT)) != 0)
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#define CGEN_ATTR_CGEN_IFLD_SIGNED_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_SIGNED)) != 0)
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/* Enum declaration for bpf ifield types. */
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typedef enum ifield_type {
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BPF_F_NIL, BPF_F_ANYOF, BPF_F_OP_CODE, BPF_F_OP_SRC
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, BPF_F_OP_CLASS, BPF_F_OP_MODE, BPF_F_OP_SIZE, BPF_F_DSTLE
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, BPF_F_SRCLE, BPF_F_DSTBE, BPF_F_SRCBE, BPF_F_REGS
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, BPF_F_OFFSET16, BPF_F_IMM32, BPF_F_IMM64_A, BPF_F_IMM64_B
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, BPF_F_IMM64_C, BPF_F_IMM64, BPF_F_MAX
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} IFIELD_TYPE;
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#define MAX_IFLD ((int) BPF_F_MAX)
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/* Hardware attribute indices. */
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/* Enum declaration for cgen_hw attrs. */
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typedef enum cgen_hw_attr {
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CGEN_HW_VIRTUAL, CGEN_HW_CACHE_ADDR, CGEN_HW_PC, CGEN_HW_PROFILE
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, CGEN_HW_END_BOOLS, CGEN_HW_START_NBOOLS = 31, CGEN_HW_MACH, CGEN_HW_ISA
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, CGEN_HW_END_NBOOLS
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} CGEN_HW_ATTR;
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/* Number of non-boolean elements in cgen_hw_attr. */
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#define CGEN_HW_NBOOL_ATTRS (CGEN_HW_END_NBOOLS - CGEN_HW_START_NBOOLS - 1)
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/* cgen_hw attribute accessor macros. */
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#define CGEN_ATTR_CGEN_HW_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_HW_MACH-CGEN_HW_START_NBOOLS-1].nonbitset)
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#define CGEN_ATTR_CGEN_HW_ISA_VALUE(attrs) ((attrs)->nonbool[CGEN_HW_ISA-CGEN_HW_START_NBOOLS-1].bitset)
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#define CGEN_ATTR_CGEN_HW_VIRTUAL_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_HW_VIRTUAL)) != 0)
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#define CGEN_ATTR_CGEN_HW_CACHE_ADDR_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_HW_CACHE_ADDR)) != 0)
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#define CGEN_ATTR_CGEN_HW_PC_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_HW_PC)) != 0)
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#define CGEN_ATTR_CGEN_HW_PROFILE_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_HW_PROFILE)) != 0)
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/* Enum declaration for bpf hardware types. */
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typedef enum cgen_hw_type {
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HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR
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, HW_H_IADDR, HW_H_GPR, HW_H_PC, HW_H_SINT64
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, HW_MAX
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} CGEN_HW_TYPE;
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#define MAX_HW ((int) HW_MAX)
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/* Operand attribute indices. */
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/* Enum declaration for cgen_operand attrs. */
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typedef enum cgen_operand_attr {
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CGEN_OPERAND_VIRTUAL, CGEN_OPERAND_PCREL_ADDR, CGEN_OPERAND_ABS_ADDR, CGEN_OPERAND_SIGN_OPT
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, CGEN_OPERAND_SIGNED, CGEN_OPERAND_NEGATIVE, CGEN_OPERAND_RELAX, CGEN_OPERAND_SEM_ONLY
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, CGEN_OPERAND_END_BOOLS, CGEN_OPERAND_START_NBOOLS = 31, CGEN_OPERAND_MACH, CGEN_OPERAND_ISA
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, CGEN_OPERAND_END_NBOOLS
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} CGEN_OPERAND_ATTR;
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/* Number of non-boolean elements in cgen_operand_attr. */
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#define CGEN_OPERAND_NBOOL_ATTRS (CGEN_OPERAND_END_NBOOLS - CGEN_OPERAND_START_NBOOLS - 1)
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/* cgen_operand attribute accessor macros. */
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#define CGEN_ATTR_CGEN_OPERAND_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_OPERAND_MACH-CGEN_OPERAND_START_NBOOLS-1].nonbitset)
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#define CGEN_ATTR_CGEN_OPERAND_ISA_VALUE(attrs) ((attrs)->nonbool[CGEN_OPERAND_ISA-CGEN_OPERAND_START_NBOOLS-1].bitset)
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#define CGEN_ATTR_CGEN_OPERAND_VIRTUAL_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_VIRTUAL)) != 0)
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#define CGEN_ATTR_CGEN_OPERAND_PCREL_ADDR_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_PCREL_ADDR)) != 0)
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#define CGEN_ATTR_CGEN_OPERAND_ABS_ADDR_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_ABS_ADDR)) != 0)
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#define CGEN_ATTR_CGEN_OPERAND_SIGN_OPT_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_SIGN_OPT)) != 0)
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#define CGEN_ATTR_CGEN_OPERAND_SIGNED_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_SIGNED)) != 0)
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#define CGEN_ATTR_CGEN_OPERAND_NEGATIVE_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_NEGATIVE)) != 0)
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#define CGEN_ATTR_CGEN_OPERAND_RELAX_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_RELAX)) != 0)
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#define CGEN_ATTR_CGEN_OPERAND_SEM_ONLY_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_SEM_ONLY)) != 0)
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/* Enum declaration for bpf operand types. */
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typedef enum cgen_operand_type {
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BPF_OPERAND_PC, BPF_OPERAND_DSTLE, BPF_OPERAND_SRCLE, BPF_OPERAND_DSTBE
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, BPF_OPERAND_SRCBE, BPF_OPERAND_DISP16, BPF_OPERAND_DISP32, BPF_OPERAND_IMM32
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, BPF_OPERAND_OFFSET16, BPF_OPERAND_IMM64, BPF_OPERAND_ENDSIZE, BPF_OPERAND_MAX
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} CGEN_OPERAND_TYPE;
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/* Number of operands types. */
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#define MAX_OPERANDS 11
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/* Maximum number of operands referenced by any insn. */
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#define MAX_OPERAND_INSTANCES 8
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/* Insn attribute indices. */
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/* Enum declaration for cgen_insn attrs. */
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typedef enum cgen_insn_attr {
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CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI
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, CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAXED
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, CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_END_BOOLS, CGEN_INSN_START_NBOOLS = 31
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, CGEN_INSN_MACH, CGEN_INSN_ISA, CGEN_INSN_END_NBOOLS
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} CGEN_INSN_ATTR;
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/* Number of non-boolean elements in cgen_insn_attr. */
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#define CGEN_INSN_NBOOL_ATTRS (CGEN_INSN_END_NBOOLS - CGEN_INSN_START_NBOOLS - 1)
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/* cgen_insn attribute accessor macros. */
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#define CGEN_ATTR_CGEN_INSN_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_MACH-CGEN_INSN_START_NBOOLS-1].nonbitset)
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#define CGEN_ATTR_CGEN_INSN_ISA_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_ISA-CGEN_INSN_START_NBOOLS-1].bitset)
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#define CGEN_ATTR_CGEN_INSN_ALIAS_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_ALIAS)) != 0)
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#define CGEN_ATTR_CGEN_INSN_VIRTUAL_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_VIRTUAL)) != 0)
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#define CGEN_ATTR_CGEN_INSN_UNCOND_CTI_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_UNCOND_CTI)) != 0)
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#define CGEN_ATTR_CGEN_INSN_COND_CTI_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_COND_CTI)) != 0)
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#define CGEN_ATTR_CGEN_INSN_SKIP_CTI_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_SKIP_CTI)) != 0)
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#define CGEN_ATTR_CGEN_INSN_DELAY_SLOT_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_DELAY_SLOT)) != 0)
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#define CGEN_ATTR_CGEN_INSN_RELAXABLE_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_RELAXABLE)) != 0)
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#define CGEN_ATTR_CGEN_INSN_RELAXED_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_RELAXED)) != 0)
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#define CGEN_ATTR_CGEN_INSN_NO_DIS_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_NO_DIS)) != 0)
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#define CGEN_ATTR_CGEN_INSN_PBB_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_PBB)) != 0)
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/* cgen.h uses things we just defined. */
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#include "opcode/cgen.h"
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extern const struct cgen_ifld bpf_cgen_ifld_table[];
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/* Attributes. */
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extern const CGEN_ATTR_TABLE bpf_cgen_hardware_attr_table[];
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extern const CGEN_ATTR_TABLE bpf_cgen_ifield_attr_table[];
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extern const CGEN_ATTR_TABLE bpf_cgen_operand_attr_table[];
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extern const CGEN_ATTR_TABLE bpf_cgen_insn_attr_table[];
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/* Hardware decls. */
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extern CGEN_KEYWORD bpf_cgen_opval_h_gpr;
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extern const CGEN_HW_ENTRY bpf_cgen_hw_table[];
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#ifdef __cplusplus
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}
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#endif
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#endif /* BPF_CPU_H */
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