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https://review.haiku-os.org/buildtools
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92b3138b83
Updated dependencies: * GMP 6.2.1 * ISL 0.24 * MPL 1.2.1 * MPFR 4.1.0 The dependencies were pulled in by running the ./contrib/download_prerequisites script and then manually removing the symbolic links and archives, and renaming the directories (i.e mv isl-0.24 to isl)
429 lines
11 KiB
ArmAsm
429 lines
11 KiB
ArmAsm
/* PowerPC support code for fibers and multithreading.
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Copyright (C) 2019-2023 Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 3, or (at your option) any later
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version.
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GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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#include "../common/threadasm.S"
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#if !defined(__PPC64__) && !defined(__MACH__)
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/**
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* Performs a context switch.
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*
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* r3 - old context pointer
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* r4 - new context pointer
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*
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*/
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.text
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.globl CSYM(fiber_switchContext)
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.type CSYM(fiber_switchContext), @function
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.align 2
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CSYM(fiber_switchContext):
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.cfi_startproc
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/* Save linkage area */
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mflr 0
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mfcr 5
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stw 0, 8(1)
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stw 5, 4(1)
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/* Save GPRs */
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stw 11, (-1 * 4)(1)
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stw 13, (-2 * 4)(1)
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stw 14, (-3 * 4)(1)
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stw 15, (-4 * 4)(1)
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stw 16, (-5 * 4)(1)
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stw 17, (-6 * 4)(1)
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stw 18, (-7 * 4)(1)
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stw 19, (-8 * 4)(1)
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stw 20, (-9 * 4)(1)
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stw 21, (-10 * 4)(1)
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stw 22, (-11 * 4)(1)
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stw 23, (-12 * 4)(1)
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stw 24, (-13 * 4)(1)
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stw 25, (-14 * 4)(1)
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stw 26, (-15 * 4)(1)
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stw 27, (-16 * 4)(1)
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stw 28, (-17 * 4)(1)
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stw 29, (-18 * 4)(1)
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stw 30, (-19 * 4)(1)
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stwu 31, (-20 * 4)(1)
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/* We update the stack pointer here, since we do not want the GC to
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scan the floating point registers. */
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/* Save FPRs */
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stfd 14, (-1 * 8)(1)
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stfd 15, (-2 * 8)(1)
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stfd 16, (-3 * 8)(1)
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stfd 17, (-4 * 8)(1)
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stfd 18, (-5 * 8)(1)
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stfd 19, (-6 * 8)(1)
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stfd 20, (-7 * 8)(1)
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stfd 21, (-8 * 8)(1)
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stfd 22, (-9 * 8)(1)
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stfd 23, (-10 * 8)(1)
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stfd 24, (-11 * 8)(1)
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stfd 25, (-12 * 8)(1)
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stfd 26, (-13 * 8)(1)
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stfd 27, (-14 * 8)(1)
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stfd 28, (-15 * 8)(1)
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stfd 29, (-16 * 8)(1)
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stfd 30, (-17 * 8)(1)
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stfd 31, (-18 * 8)(1)
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/* Update the old stack pointer */
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stw 1, 0(3)
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/* Set new stack pointer */
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addi 1, 4, 20 * 4
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/* Restore linkage area */
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lwz 0, 8(1)
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lwz 5, 4(1)
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/* Restore GPRs */
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lwz 11, (-1 * 4)(1)
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lwz 13, (-2 * 4)(1)
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lwz 14, (-3 * 4)(1)
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lwz 15, (-4 * 4)(1)
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lwz 16, (-5 * 4)(1)
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lwz 17, (-6 * 4)(1)
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lwz 18, (-7 * 4)(1)
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lwz 19, (-8 * 4)(1)
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lwz 20, (-9 * 4)(1)
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lwz 21, (-10 * 4)(1)
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lwz 22, (-11 * 4)(1)
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lwz 23, (-12 * 4)(1)
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lwz 24, (-13 * 4)(1)
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lwz 25, (-14 * 4)(1)
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lwz 26, (-15 * 4)(1)
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lwz 27, (-16 * 4)(1)
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lwz 28, (-17 * 4)(1)
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lwz 29, (-18 * 4)(1)
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lwz 30, (-19 * 4)(1)
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lwz 31, (-20 * 4)(1)
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/* Restore FPRs */
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lfd 14, (-1 * 8)(4)
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lfd 15, (-2 * 8)(4)
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lfd 16, (-3 * 8)(4)
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lfd 17, (-4 * 8)(4)
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lfd 18, (-5 * 8)(4)
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lfd 19, (-6 * 8)(4)
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lfd 20, (-7 * 8)(4)
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lfd 21, (-8 * 8)(4)
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lfd 22, (-9 * 8)(4)
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lfd 23, (-10 * 8)(4)
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lfd 24, (-11 * 8)(4)
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lfd 25, (-12 * 8)(4)
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lfd 26, (-13 * 8)(4)
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lfd 27, (-14 * 8)(4)
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lfd 28, (-15 * 8)(4)
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lfd 29, (-16 * 8)(4)
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lfd 30, (-17 * 8)(4)
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lfd 31, (-18 * 8)(4)
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/* Set condition and link register */
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mtcr 5
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mtlr 0
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/* Return and switch context */
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blr
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.cfi_endproc
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.size CSYM(fiber_switchContext),.-CSYM(fiber_switchContext)
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#elif defined(__MACH__)
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/* Implementation for Darwin/macOS preserving callee-saved regs.
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FIXME : There is no unwind frame.
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FIXME : not sure if we should save the vsave reg (perhaps using the slot we have
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r11 in at present). */
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/* Darwin has a red zone (220 bytes for PPC 288 for PPC64) which we can write
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to before the stack is updated without worrying about it being clobbered by
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signals or hardware interrupts.
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The stack will be 16byte aligned on entry with:
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PPC PPC64
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SP-> +---------------------------------------+
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| back chain to caller | 0 0
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+---------------------------------------+
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| slot to save CR | 4 8
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+---------------------------------------+
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| slot to save LR | 8 16
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+---------------------------------------+
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| etc.. etc.. as per C calling conv. | */
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# if __PPC64__
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# define LD ld
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# define ST std
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# define STU stdu
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# define SZ 8
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# define MACHINE ppc64
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# define RED_ZONE 288
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# else
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# define LD lwz
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# define ST stw
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# define STU stwu
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# define SZ 4
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# define MACHINE ppc7400
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# define RED_ZONE 220
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# endif
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# define SAVE_VECTORS 0
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/**
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* Performs a context switch.
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*
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* r3 - old context pointer
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* r4 - new context pointer
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*
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*/
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.machine MACHINE
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.text
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.globl CSYM(fiber_switchContext)
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.align 2
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CSYM(fiber_switchContext):
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LFB0:
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/* Get the link reg. */
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mflr r0
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/* Get the callee-saved crs (well all of them, actually). */
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mfcr r12
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/* Save GPRs, we save the static chain here too although it is not clear if we need to. */
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ST r31, ( -1 * SZ)(r1)
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ST r30, ( -2 * SZ)(r1)
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ST r29, ( -3 * SZ)(r1)
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ST r28, ( -4 * SZ)(r1)
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ST r27, ( -5 * SZ)(r1)
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ST r26, ( -6 * SZ)(r1)
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ST r25, ( -7 * SZ)(r1)
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ST r24, ( -8 * SZ)(r1)
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ST r23, ( -9 * SZ)(r1)
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ST r22, (-10 * SZ)(r1)
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ST r21, (-11 * SZ)(r1)
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ST r20, (-12 * SZ)(r1)
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ST r19, (-13 * SZ)(r1)
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ST r18, (-14 * SZ)(r1)
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ST r17, (-15 * SZ)(r1)
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ST r16, (-16 * SZ)(r1)
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ST r15, (-17 * SZ)(r1)
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ST r14, (-18 * SZ)(r1)
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ST r13, (-19 * SZ)(r1)
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/* Save the lr and cr into the normal function linkage area. */
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ST r0, 2*SZ(r1)
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ST r12, SZ(r1)
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/* We update the stack pointer here, since we do not want the GC to
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scan the floating point registers. We are still 16-byte aligned. */
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STU r11, (-20 * SZ)(r1)
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/* Update the stack pointer in the old context as per comment above. */
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ST r1, 0(r3)
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/* Save FPRs - same for PPC and PPC64 */
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stfd f14, (-18 * 8)(r1)
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stfd f15, (-17 * 8)(r1)
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stfd f16, (-16 * 8)(r1)
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stfd f17, (-15 * 8)(r1)
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stfd f18, (-14 * 8)(r1)
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stfd f19, (-13 * 8)(r1)
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stfd f20, (-12 * 8)(r1)
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stfd f21, (-11 * 8)(r1)
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stfd f22, (-10 * 8)(r1)
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stfd f23, ( -9 * 8)(r1)
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stfd f24, ( -8 * 8)(r1)
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stfd f25, ( -7 * 8)(r1)
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stfd f26, ( -6 * 8)(r1)
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stfd f27, ( -5 * 8)(r1)
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stfd f28, ( -4 * 8)(r1)
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stfd f29, ( -3 * 8)(r1)
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stfd f30, ( -2 * 8)(r1)
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stfd f31, ( -1 * 8)(r1)
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#if SAVE_VECTORS
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/* We are still 16byte aligned - so we are ok for vector saves.
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but the combined size of the vectors (12 x 16) + the FPRs (144) exceeds the
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red zone size so we need to adjust the stack again - note this means careful
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ordering is needed on the restore. */
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addi r1, r1, -(12*16+18*8)
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li r11, 0
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stvx v20,r11,r1
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addi r11, r11, 16
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stvx v21,r11,r1
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addi r11, r11, 16
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stvx v22,r11,r1
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addi r11, r11, 16
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stvx v23,r11,r1
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addi r11, r11, 16
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stvx v24,r11,r1
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addi r11, r11, 16
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stvx v25,r11,r1
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addi r11, r11, 16
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stvx v26,r11,r1
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addi r11, r11, 16
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stvx v27,r11,r1
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addi r11, r11, 16
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stvx v28,r11,r1
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addi r11, r11, 16
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stvx v29,r11,r1
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addi r11, r11, 16
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stvx v30,r11,r1
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addi r11, r11, 16
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stvx v31,r11,r1
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/* Now do the same thing in reverse - starting with r4 pointing to
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the block of GPRs - stage 1 point to the saved vectors and fprs. */
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addi r1, r4, -(12*16+18*8)
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li r11, 0
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lvx v20,r11,r1
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addi r11, r11, 16
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lvx v21,r11,r1
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addi r11, r11, 16
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lvx v22,r11,r1
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addi r11, r11, 16
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lvx v23,r11,r1
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addi r11, r11, 16
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lvx v24,r11,r1
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addi r11, r11, 16
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lvx v25,r11,r1
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addi r11, r11, 16
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lvx v26,r11,r1
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addi r11, r11, 16
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lvx v27,r11,r1
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addi r11, r11, 16
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lvx v28,r11,r1
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addi r11, r11, 16
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lvx v29,r11,r1
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addi r11, r11, 16
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lvx v30,r11,r1
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addi r11, r11, 16
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lvx v31,r11,r1
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#endif
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/* Now it is safe to update the stack pointer since the combined
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size of the GPRs and FPRs will not exceed the red zone. */
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addi r1, r4, 20 * SZ
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/* Restore FPRs */
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lfd f14, (-18 * 8)(r4)
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lfd f15, (-17 * 8)(r4)
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lfd f16, (-16 * 8)(r4)
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lfd f17, (-15 * 8)(r4)
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lfd f18, (-14 * 8)(r4)
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lfd f19, (-13 * 8)(r4)
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lfd f20, (-12 * 8)(r4)
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lfd f21, (-11 * 8)(r4)
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lfd f22, (-10 * 8)(r4)
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lfd f23, ( -9 * 8)(r4)
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lfd f24, ( -8 * 8)(r4)
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lfd f25, ( -7 * 8)(r4)
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lfd f26, ( -6 * 8)(r4)
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lfd f27, ( -5 * 8)(r4)
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lfd f28, ( -4 * 8)(r4)
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lfd f29, ( -3 * 8)(r4)
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lfd f30, ( -2 * 8)(r4)
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lfd f31, ( -1 * 8)(r4)
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/* Pick up lr and cr */
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LD r0, 2*SZ(r1)
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LD r12, SZ(r1)
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/* Restore GPRs */
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LD r11, (-20 * SZ)(r1)
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LD r13, (-19 * SZ)(r1)
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LD r14, (-18 * SZ)(r1)
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LD r15, (-17 * SZ)(r1)
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LD r16, (-16 * SZ)(r1)
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LD r17, (-15 * SZ)(r1)
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LD r18, (-14 * SZ)(r1)
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LD r19, (-13 * SZ)(r1)
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LD r20, (-12 * SZ)(r1)
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LD r21, (-11 * SZ)(r1)
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LD r22, (-10 * SZ)(r1)
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LD r23, ( -9 * SZ)(r1)
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LD r24, ( -8 * SZ)(r1)
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LD r25, ( -7 * SZ)(r1)
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LD r26, ( -6 * SZ)(r1)
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LD r27, ( -5 * SZ)(r1)
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LD r28, ( -4 * SZ)(r1)
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LD r29, ( -3 * SZ)(r1)
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LD r30, ( -2 * SZ)(r1)
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LD r31, ( -1 * SZ)(r1)
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/* Set cr and lr */
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mtcr r12
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mtlr r0
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/* Return and switch context */
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blr
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LFE0:
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/* Minimal CFI / FDE which does not describe the stacking of the GPRs - but only that
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the routine has been entered/exited. */
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# if __PPC64__
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# define DATA_ALIGN 0x78
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# define ALIGN_SIZE 3
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# define ADDRD .quad
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# else
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# define DATA_ALIGN 0x7c
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# define ALIGN_SIZE 3
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# define ADDRD .long
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# endif
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.section __TEXT,__eh_frame,coalesced,no_toc+strip_static_syms+live_support
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EH_frame1:
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.set L$set$0,LECIE1-LSCIE1
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.long L$set$0 ; Length of Common Information Entry
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LSCIE1:
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.long 0 ; CIE Identifier Tag
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.byte 0x3 ; CIE Version
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.ascii "zR\0" ; CIE Augmentation
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.byte 0x1 ; uleb128 0x1; CIE Code Alignment Factor
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.byte DATA_ALIGN ; sleb128 -4/-8; CIE Data Alignment Factor
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.byte 0x41 ; uleb128 0x41; CIE RA Column
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.byte 0x1 ; uleb128 0x1; Augmentation size
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.byte 0x10 ; FDE Encoding (pcrel)
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.byte 0xc ; DW_CFA_def_cfa
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.byte 0x1 ; uleb128 0x1
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.byte 0 ; uleb128 0
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.p2align ALIGN_SIZE,0
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LECIE1:
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LSFDE1:
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.set L$set$1,LEFDE1-LASFDE1
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.long L$set$1 ; FDE Length
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LASFDE1:
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.long LASFDE1-EH_frame1 ; FDE CIE offset
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ADDRD LFB0-. ; FDE initial location
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.set L$set$2,LFE0-LFB0
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ADDRD L$set$2 ; FDE address range
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.byte 0 ; uleb128 0; Augmentation size
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.p2align ALIGN_SIZE,0
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LEFDE1:
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#endif /* defined(__MACH__) */
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