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f133d007f9
Old version was from 2012-05-06, 6.1.2 is from 2016-12-16 A lot of support for newer processors and speedups since then See gmp/NEWS for details
101 lines
2.7 KiB
NASM
101 lines
2.7 KiB
NASM
dnl PowerPC-32 mpn_addlsh1_n -- rp[] = up[] + (vp[] << 1)
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dnl Copyright 2003, 2005, 2007 Free Software Foundation, Inc.
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dnl This file is part of the GNU MP Library.
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dnl
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dnl The GNU MP Library is free software; you can redistribute it and/or modify
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dnl it under the terms of either:
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dnl
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dnl * the GNU Lesser General Public License as published by the Free
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dnl Software Foundation; either version 3 of the License, or (at your
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dnl option) any later version.
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dnl
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dnl or
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dnl
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dnl * the GNU General Public License as published by the Free Software
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dnl Foundation; either version 2 of the License, or (at your option) any
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dnl later version.
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dnl
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dnl or both in parallel, as here.
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dnl
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dnl The GNU MP Library is distributed in the hope that it will be useful, but
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dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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dnl for more details.
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dnl
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dnl You should have received copies of the GNU General Public License and the
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dnl GNU Lesser General Public License along with the GNU MP Library. If not,
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dnl see https://www.gnu.org/licenses/.
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include(`../config.m4')
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C cycles/limb
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C 603e: ?
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C 604e: 4.0
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C 75x (G3): 5.0
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C 7400,7410 (G4): 5.0
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C 744x,745x (G4+): 5.0
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C power4/ppc970: 4.25
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C power5: 5.0
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C INPUT PARAMETERS
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C rp r3
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C up r4
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C vp r5
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C n r6
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define(`rp',`r3')
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define(`up',`r4')
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define(`vp',`r5')
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define(`s0',`r6')
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define(`s1',`r7')
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define(`u0',`r8')
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define(`v0',`r10')
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define(`v1',`r11')
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ASM_START()
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PROLOGUE(mpn_addlsh1_n)
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mtctr r6 C copy n in ctr
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addic r31, r31, 0 C clear cy
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lwz v0, 0(vp) C load v limb
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lwz u0, 0(up) C load u limb
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addi up, up, -4 C update up
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addi rp, rp, -4 C update rp
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slwi s1, v0, 1
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bdz L(end) C If done, skip loop
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L(loop):
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lwz v1, 4(vp) C load v limb
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adde s1, s1, u0 C add limbs with cy, set cy
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srwi s0, v0, 31 C shift down previous v limb
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stw s1, 4(rp) C store result limb
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lwzu u0, 8(up) C load u limb and update up
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rlwimi s0, v1, 1, 0,30 C left shift v limb and merge with prev v limb
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bdz L(exit) C decrement ctr and exit if done
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lwzu v0, 8(vp) C load v limb and update vp
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adde s0, s0, u0 C add limbs with cy, set cy
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srwi s1, v1, 31 C shift down previous v limb
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stwu s0, 8(rp) C store result limb and update rp
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lwz u0, 4(up) C load u limb
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rlwimi s1, v0, 1, 0,30 C left shift v limb and merge with prev v limb
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bdnz L(loop) C decrement ctr and loop back
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L(end): adde r7, s1, u0
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srwi r4, v0, 31
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stw r7, 4(rp) C store last result limb
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addze r3, r4
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blr
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L(exit):
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adde r7, s0, u0
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srwi r4, v1, 31
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stw r7, 8(rp) C store last result limb
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addze r3, r4
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blr
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EPILOGUE()
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