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Old version was from 2012-05-06, 6.1.2 is from 2016-12-16 A lot of support for newer processors and speedups since then See gmp/NEWS for details
171 lines
3.7 KiB
NASM
171 lines
3.7 KiB
NASM
dnl AMD64 mpn_addlsh1_n -- rp[] = up[] + (vp[] << 1)
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dnl AMD64 mpn_rsblsh1_n -- rp[] = (vp[] << 1) - up[]
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dnl Copyright 2003, 2005-2009, 2011, 2012 Free Software Foundation, Inc.
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dnl This file is part of the GNU MP Library.
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dnl
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dnl The GNU MP Library is free software; you can redistribute it and/or modify
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dnl it under the terms of either:
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dnl
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dnl * the GNU Lesser General Public License as published by the Free
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dnl Software Foundation; either version 3 of the License, or (at your
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dnl option) any later version.
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dnl
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dnl or
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dnl
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dnl * the GNU General Public License as published by the Free Software
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dnl Foundation; either version 2 of the License, or (at your option) any
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dnl later version.
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dnl
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dnl or both in parallel, as here.
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dnl
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dnl The GNU MP Library is distributed in the hope that it will be useful, but
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dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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dnl for more details.
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dnl
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dnl You should have received copies of the GNU General Public License and the
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dnl GNU Lesser General Public License along with the GNU MP Library. If not,
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dnl see https://www.gnu.org/licenses/.
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include(`../config.m4')
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C cycles/limb
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C AMD K8,K9 2
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C AMD K10 2
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C AMD bd1 ?
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C AMD bobcat ?
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C Intel P4 13
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C Intel core2 3.45
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C Intel NHM ?
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C Intel SBR ?
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C Intel atom ?
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C VIA nano ?
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C Sometimes speed degenerates, supposedly related to that some operand
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C alignments cause cache conflicts.
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C The speed is limited by decoding/issue bandwidth. There are 22 instructions
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C in the loop, which corresponds to ceil(22/3)/4 = 1.83 c/l.
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C INPUT PARAMETERS
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define(`rp',`%rdi')
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define(`up',`%rsi')
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define(`vp',`%rdx')
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define(`n', `%rcx')
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ifdef(`OPERATION_addlsh1_n', `
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define(ADDSUB, add)
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define(ADCSBB, adc)
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define(func, mpn_addlsh1_n)')
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ifdef(`OPERATION_rsblsh1_n', `
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define(ADDSUB, sub)
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define(ADCSBB, sbb)
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define(func, mpn_rsblsh1_n)')
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MULFUNC_PROLOGUE(mpn_addlsh1_n mpn_rsblsh1_n)
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ABI_SUPPORT(DOS64)
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ABI_SUPPORT(STD64)
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ASM_START()
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TEXT
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ALIGN(16)
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PROLOGUE(func)
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FUNC_ENTRY(4)
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push %rbp
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mov (vp), %r8
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mov R32(n), R32(%rax)
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lea (rp,n,8), rp
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lea (up,n,8), up
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lea (vp,n,8), vp
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neg n
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xor R32(%rbp), R32(%rbp)
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and $3, R32(%rax)
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je L(b00)
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cmp $2, R32(%rax)
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jc L(b01)
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je L(b10)
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L(b11): add %r8, %r8
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mov 8(vp,n,8), %r9
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adc %r9, %r9
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mov 16(vp,n,8), %r10
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adc %r10, %r10
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sbb R32(%rax), R32(%rax) C save scy
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ADDSUB (up,n,8), %r8
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ADCSBB 8(up,n,8), %r9
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mov %r8, (rp,n,8)
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mov %r9, 8(rp,n,8)
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ADCSBB 16(up,n,8), %r10
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mov %r10, 16(rp,n,8)
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sbb R32(%rbp), R32(%rbp) C save acy
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add $3, n
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jmp L(ent)
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L(b10): add %r8, %r8
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mov 8(vp,n,8), %r9
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adc %r9, %r9
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sbb R32(%rax), R32(%rax) C save scy
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ADDSUB (up,n,8), %r8
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ADCSBB 8(up,n,8), %r9
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mov %r8, (rp,n,8)
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mov %r9, 8(rp,n,8)
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sbb R32(%rbp), R32(%rbp) C save acy
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add $2, n
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jmp L(ent)
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L(b01): add %r8, %r8
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sbb R32(%rax), R32(%rax) C save scy
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ADDSUB (up,n,8), %r8
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mov %r8, (rp,n,8)
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sbb R32(%rbp), R32(%rbp) C save acy
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inc n
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L(ent): jns L(end)
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ALIGN(16)
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L(top): add R32(%rax), R32(%rax) C restore scy
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mov (vp,n,8), %r8
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L(b00): adc %r8, %r8
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mov 8(vp,n,8), %r9
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adc %r9, %r9
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mov 16(vp,n,8), %r10
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adc %r10, %r10
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mov 24(vp,n,8), %r11
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adc %r11, %r11
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sbb R32(%rax), R32(%rax) C save scy
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add R32(%rbp), R32(%rbp) C restore acy
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ADCSBB (up,n,8), %r8
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nop C Hammer speedup!
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ADCSBB 8(up,n,8), %r9
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mov %r8, (rp,n,8)
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mov %r9, 8(rp,n,8)
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ADCSBB 16(up,n,8), %r10
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ADCSBB 24(up,n,8), %r11
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mov %r10, 16(rp,n,8)
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mov %r11, 24(rp,n,8)
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sbb R32(%rbp), R32(%rbp) C save acy
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add $4, n
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js L(top)
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L(end):
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ifdef(`OPERATION_addlsh1_n',`
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add R32(%rbp), R32(%rax)
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neg R32(%rax)')
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ifdef(`OPERATION_rsblsh1_n',`
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sub R32(%rax), R32(%rbp)
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movslq R32(%rbp), %rax')
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pop %rbp
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FUNC_EXIT()
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ret
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EPILOGUE()
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