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f133d007f9
Old version was from 2012-05-06, 6.1.2 is from 2016-12-16 A lot of support for newer processors and speedups since then See gmp/NEWS for details
288 lines
5.4 KiB
NASM
288 lines
5.4 KiB
NASM
dnl x86-64 mpn_rsh1add_n/mpn_rsh1sub_n.
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dnl Contributed to the GNU project by Torbjorn Granlund.
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dnl Copyright 2011, 2012 Free Software Foundation, Inc.
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dnl This file is part of the GNU MP Library.
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dnl
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dnl The GNU MP Library is free software; you can redistribute it and/or modify
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dnl it under the terms of either:
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dnl
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dnl * the GNU Lesser General Public License as published by the Free
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dnl Software Foundation; either version 3 of the License, or (at your
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dnl option) any later version.
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dnl
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dnl or
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dnl
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dnl * the GNU General Public License as published by the Free Software
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dnl Foundation; either version 2 of the License, or (at your option) any
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dnl later version.
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dnl
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dnl or both in parallel, as here.
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dnl
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dnl The GNU MP Library is distributed in the hope that it will be useful, but
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dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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dnl for more details.
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dnl
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dnl You should have received copies of the GNU General Public License and the
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dnl GNU Lesser General Public License along with the GNU MP Library. If not,
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dnl see https://www.gnu.org/licenses/.
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include(`../config.m4')
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C TODO
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C * Schedule loop less. It is now almost surely overscheduled, resulting in
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C large feed-in and wind-down code.
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C cycles/limb
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C AMD K8,K9 ?
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C AMD K10 ?
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C Intel P4 ?
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C Intel core2 ?
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C Intel NMH ?
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C Intel SBR ?
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C Intel atom 5.25
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C VIA nano ?
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C INPUT PARAMETERS
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define(`rp',`%rdi')
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define(`up',`%rsi')
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define(`vp',`%rdx')
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define(`n',`%rcx')
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ifdef(`OPERATION_rsh1add_n', `
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define(ADDSUB, add)
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define(ADCSBB, adc)
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define(func_n, mpn_rsh1add_n)
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define(func_nc, mpn_rsh1add_nc)')
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ifdef(`OPERATION_rsh1sub_n', `
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define(ADDSUB, sub)
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define(ADCSBB, sbb)
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define(func_n, mpn_rsh1sub_n)
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define(func_nc, mpn_rsh1sub_nc)')
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ABI_SUPPORT(DOS64)
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ABI_SUPPORT(STD64)
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MULFUNC_PROLOGUE(mpn_rsh1add_n mpn_rsh1sub_n)
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ASM_START()
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TEXT
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ALIGN(16)
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PROLOGUE(func_n)
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FUNC_ENTRY(4)
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push %rbx
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push %rbp
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push %r12
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push %r13
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push %r14
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push %r15
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mov (up), %r15
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ADDSUB (vp), %r15
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sbb R32(%rbx), R32(%rbx)
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xor R32(%rax), R32(%rax)
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shr %r15
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adc R32(%rax), R32(%rax) C return value
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mov R32(n), R32(%rbp)
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and $3, R32(%rbp)
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jz L(b0)
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cmp $2, R32(%rbp)
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jae L(b23)
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L(b1): dec n
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jnz L(gt1)
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shl $63, %rbx
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add %rbx, %r15
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mov %r15, (rp)
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jmp L(cj1)
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L(gt1): lea 24(up), up
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lea 24(vp), vp
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mov -16(up), %r9
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add R32(%rbx), R32(%rbx)
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mov -8(up), %r10
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lea 24(rp), rp
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mov (up), %r11
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ADCSBB -16(vp), %r9
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ADCSBB -8(vp), %r10
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mov %r15, %r12
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ADCSBB (vp), %r11
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mov %r9, %r13
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sbb R32(%rbx), R32(%rbx)
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mov %r11, %r15
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mov %r10, %r14
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shl $63, %r11
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shl $63, %r10
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shl $63, %r9
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or %r9, %r12
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shr %r13
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mov 8(up), %r8
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shr %r14
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or %r10, %r13
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shr %r15
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or %r11, %r14
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sub $4, n
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jz L(cj5)
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L(gt5): mov 16(up), %r9
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add R32(%rbx), R32(%rbx)
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mov 24(up), %r10
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ADCSBB 8(vp), %r8
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mov %r15, %rbp
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mov 32(up), %r11
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jmp L(lo1)
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L(b23): jnz L(b3)
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mov 8(up), %r8
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sub $2, n
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jnz L(gt2)
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add R32(%rbx), R32(%rbx)
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ADCSBB 8(vp), %r8
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mov %r8, %r12
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jmp L(cj2)
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L(gt2): mov 16(up), %r9
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add R32(%rbx), R32(%rbx)
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mov 24(up), %r10
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ADCSBB 8(vp), %r8
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mov %r15, %rbp
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mov 32(up), %r11
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ADCSBB 16(vp), %r9
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lea 32(up), up
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ADCSBB 24(vp), %r10
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mov %r9, %r13
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ADCSBB 32(vp), %r11
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mov %r8, %r12
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jmp L(lo2)
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L(b3): lea 40(up), up
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lea 8(vp), vp
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mov %r15, %r14
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add R32(%rbx), R32(%rbx)
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mov -32(up), %r11
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ADCSBB 0(vp), %r11
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lea 8(rp), rp
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sbb R32(%rbx), R32(%rbx)
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mov %r11, %r15
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shl $63, %r11
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mov -24(up), %r8
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shr %r15
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or %r11, %r14
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sub $3, n
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jnz L(gt3)
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add R32(%rbx), R32(%rbx)
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ADCSBB 8(vp), %r8
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jmp L(cj3)
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L(gt3): mov -16(up), %r9
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add R32(%rbx), R32(%rbx)
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mov -8(up), %r10
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ADCSBB 8(vp), %r8
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mov %r15, %rbp
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mov (up), %r11
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ADCSBB 16(vp), %r9
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ADCSBB 24(vp), %r10
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mov %r8, %r12
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jmp L(lo3)
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L(b0): lea 48(up), up
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lea 16(vp), vp
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add R32(%rbx), R32(%rbx)
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mov -40(up), %r10
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lea 16(rp), rp
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mov -32(up), %r11
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ADCSBB -8(vp), %r10
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mov %r15, %r13
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ADCSBB (vp), %r11
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sbb R32(%rbx), R32(%rbx)
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mov %r11, %r15
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mov %r10, %r14
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shl $63, %r11
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shl $63, %r10
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mov -24(up), %r8
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shr %r14
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or %r10, %r13
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shr %r15
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or %r11, %r14
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sub $4, n
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jnz L(gt4)
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add R32(%rbx), R32(%rbx)
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ADCSBB 8(vp), %r8
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jmp L(cj4)
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L(gt4): mov -16(up), %r9
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add R32(%rbx), R32(%rbx)
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mov -8(up), %r10
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ADCSBB 8(vp), %r8
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mov %r15, %rbp
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mov (up), %r11
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ADCSBB 16(vp), %r9
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jmp L(lo0)
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ALIGN(8)
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L(top): mov 16(up), %r9
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shr %r14
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or %r10, %r13
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shr %r15
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or %r11, %r14
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add R32(%rbx), R32(%rbx)
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mov 24(up), %r10
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mov %rbp, (rp)
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ADCSBB 8(vp), %r8
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mov %r15, %rbp
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lea 32(rp), rp
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mov 32(up), %r11
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L(lo1): ADCSBB 16(vp), %r9
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lea 32(up), up
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mov %r12, -24(rp)
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L(lo0): ADCSBB 24(vp), %r10
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mov %r8, %r12
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mov %r13, -16(rp)
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L(lo3): ADCSBB 32(vp), %r11
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mov %r9, %r13
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mov %r14, -8(rp)
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L(lo2): sbb R32(%rbx), R32(%rbx)
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shl $63, %r8
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mov %r11, %r15
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shr %r12
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mov %r10, %r14
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shl $63, %r9
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lea 32(vp), vp
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shl $63, %r10
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or %r8, %rbp
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shl $63, %r11
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or %r9, %r12
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shr %r13
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mov 8(up), %r8
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sub $4, n
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jg L(top)
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L(end): shr %r14
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or %r10, %r13
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shr %r15
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or %r11, %r14
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mov %rbp, (rp)
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lea 32(rp), rp
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L(cj5): add R32(%rbx), R32(%rbx)
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ADCSBB 8(vp), %r8
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mov %r12, -24(rp)
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L(cj4): mov %r13, -16(rp)
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L(cj3): mov %r8, %r12
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mov %r14, -8(rp)
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L(cj2): sbb R32(%rbx), R32(%rbx)
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shl $63, %r8
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shr %r12
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or %r8, %r15
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shl $63, %rbx
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add %rbx, %r12
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mov %r15, (rp)
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mov %r12, 8(rp)
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L(cj1): pop %r15
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pop %r14
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pop %r13
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pop %r12
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pop %rbp
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pop %rbx
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FUNC_EXIT()
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ret
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EPILOGUE()
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