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f133d007f9
Old version was from 2012-05-06, 6.1.2 is from 2016-12-16 A lot of support for newer processors and speedups since then See gmp/NEWS for details
184 lines
4.2 KiB
NASM
184 lines
4.2 KiB
NASM
dnl AMD64 mpn_cnd_add_n, mpn_cnd_sub_n
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dnl Copyright 2011-2013 Free Software Foundation, Inc.
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dnl This file is part of the GNU MP Library.
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dnl
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dnl The GNU MP Library is free software; you can redistribute it and/or modify
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dnl it under the terms of either:
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dnl
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dnl * the GNU Lesser General Public License as published by the Free
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dnl Software Foundation; either version 3 of the License, or (at your
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dnl option) any later version.
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dnl
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dnl or
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dnl
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dnl * the GNU General Public License as published by the Free Software
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dnl Foundation; either version 2 of the License, or (at your option) any
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dnl later version.
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dnl
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dnl or both in parallel, as here.
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dnl
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dnl The GNU MP Library is distributed in the hope that it will be useful, but
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dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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dnl for more details.
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dnl
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dnl You should have received copies of the GNU General Public License and the
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dnl GNU Lesser General Public License along with the GNU MP Library. If not,
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dnl see https://www.gnu.org/licenses/.
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include(`../config.m4')
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C cycles/limb
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C AMD K8,K9 2
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C AMD K10 2
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C AMD bd1 2.32
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C AMD bobcat 3
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C Intel P4 13
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C Intel core2 2.9
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C Intel NHM 2.8
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C Intel SBR 2.4
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C Intel atom 5.33
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C VIA nano 3
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C NOTES
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C * It might seem natural to use the cmov insn here, but since this function
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C is supposed to have the exact same execution pattern for cnd true and
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C false, and since cmov's documentation is not clear about whether it
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C actually reads both source operands and writes the register for a false
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C condition, we cannot use it.
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C * Two cases could be optimised: (1) cnd_add_n could use ADCSBB-from-memory
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C to save one insn/limb, and (2) when up=rp cnd_add_n and cnd_sub_n could use
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C ADCSBB-to-memory, again saving 1 insn/limb.
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C * This runs optimally at decoder bandwidth on K10. It has not been tuned
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C for any other processor.
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C INPUT PARAMETERS
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define(`cnd', `%rdi') dnl rcx
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define(`rp', `%rsi') dnl rdx
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define(`up', `%rdx') dnl r8
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define(`vp', `%rcx') dnl r9
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define(`n', `%r8') dnl rsp+40
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ifdef(`OPERATION_cnd_add_n', `
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define(ADDSUB, add)
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define(ADCSBB, adc)
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define(func, mpn_cnd_add_n)')
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ifdef(`OPERATION_cnd_sub_n', `
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define(ADDSUB, sub)
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define(ADCSBB, sbb)
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define(func, mpn_cnd_sub_n)')
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MULFUNC_PROLOGUE(mpn_cnd_add_n mpn_cnd_sub_n)
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ABI_SUPPORT(DOS64)
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ABI_SUPPORT(STD64)
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ASM_START()
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TEXT
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ALIGN(16)
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PROLOGUE(func)
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FUNC_ENTRY(4)
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IFDOS(` mov 56(%rsp), R32(%r8)')
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push %rbx
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push %rbp
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push %r12
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push %r13
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push %r14
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neg cnd
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sbb cnd, cnd C make cnd mask
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lea (vp,n,8), vp
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lea (up,n,8), up
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lea (rp,n,8), rp
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mov R32(n), R32(%rax)
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neg n
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and $3, R32(%rax)
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jz L(top) C carry-save reg rax = 0 in this arc
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cmp $2, R32(%rax)
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jc L(b1)
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jz L(b2)
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L(b3): mov (vp,n,8), %r12
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mov 8(vp,n,8), %r13
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mov 16(vp,n,8), %r14
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and cnd, %r12
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mov (up,n,8), %r10
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and cnd, %r13
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mov 8(up,n,8), %rbx
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and cnd, %r14
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mov 16(up,n,8), %rbp
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ADDSUB %r12, %r10
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mov %r10, (rp,n,8)
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ADCSBB %r13, %rbx
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mov %rbx, 8(rp,n,8)
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ADCSBB %r14, %rbp
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mov %rbp, 16(rp,n,8)
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sbb R32(%rax), R32(%rax) C save carry
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add $3, n
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js L(top)
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jmp L(end)
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L(b2): mov (vp,n,8), %r12
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mov 8(vp,n,8), %r13
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mov (up,n,8), %r10
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and cnd, %r12
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mov 8(up,n,8), %rbx
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and cnd, %r13
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ADDSUB %r12, %r10
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mov %r10, (rp,n,8)
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ADCSBB %r13, %rbx
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mov %rbx, 8(rp,n,8)
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sbb R32(%rax), R32(%rax) C save carry
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add $2, n
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js L(top)
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jmp L(end)
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L(b1): mov (vp,n,8), %r12
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mov (up,n,8), %r10
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and cnd, %r12
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ADDSUB %r12, %r10
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mov %r10, (rp,n,8)
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sbb R32(%rax), R32(%rax) C save carry
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add $1, n
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jns L(end)
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ALIGN(16)
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L(top): mov (vp,n,8), %r12
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mov 8(vp,n,8), %r13
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mov 16(vp,n,8), %r14
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mov 24(vp,n,8), %r11
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and cnd, %r12
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mov (up,n,8), %r10
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and cnd, %r13
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mov 8(up,n,8), %rbx
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and cnd, %r14
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mov 16(up,n,8), %rbp
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and cnd, %r11
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mov 24(up,n,8), %r9
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add R32(%rax), R32(%rax) C restore carry
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ADCSBB %r12, %r10
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mov %r10, (rp,n,8)
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ADCSBB %r13, %rbx
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mov %rbx, 8(rp,n,8)
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ADCSBB %r14, %rbp
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mov %rbp, 16(rp,n,8)
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ADCSBB %r11, %r9
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mov %r9, 24(rp,n,8)
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sbb R32(%rax), R32(%rax) C save carry
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add $4, n
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js L(top)
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L(end): neg R32(%rax)
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pop %r14
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pop %r13
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pop %r12
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pop %rbp
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pop %rbx
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FUNC_EXIT()
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ret
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EPILOGUE()
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