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f133d007f9
Old version was from 2012-05-06, 6.1.2 is from 2016-12-16 A lot of support for newer processors and speedups since then See gmp/NEWS for details
242 lines
4.4 KiB
NASM
242 lines
4.4 KiB
NASM
dnl SPARC v9 mpn_add_n -- Add two limb vectors of the same length > 0 and
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dnl store sum in a third limb vector.
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dnl Copyright 2001-2003, 2011 Free Software Foundation, Inc.
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dnl This file is part of the GNU MP Library.
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dnl
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dnl The GNU MP Library is free software; you can redistribute it and/or modify
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dnl it under the terms of either:
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dnl
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dnl * the GNU Lesser General Public License as published by the Free
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dnl Software Foundation; either version 3 of the License, or (at your
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dnl option) any later version.
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dnl
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dnl or
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dnl
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dnl * the GNU General Public License as published by the Free Software
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dnl Foundation; either version 2 of the License, or (at your option) any
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dnl later version.
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dnl
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dnl or both in parallel, as here.
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dnl
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dnl The GNU MP Library is distributed in the hope that it will be useful, but
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dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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dnl for more details.
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dnl
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dnl You should have received copies of the GNU General Public License and the
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dnl GNU Lesser General Public License along with the GNU MP Library. If not,
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dnl see https://www.gnu.org/licenses/.
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include(`../config.m4')
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C cycles/limb
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C UltraSPARC 1&2: 4
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C UltraSPARC 3: 4.5
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C Compute carry-out from the most significant bits of u,v, and r, where
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C r=u+v+carry_in, using logic operations.
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C This code runs at 4 cycles/limb on UltraSPARC 1 and 2. It has a 4 insn
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C recurrency, and the UltraSPARC 1 and 2 the IE units are 100% saturated.
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C Therefore, it seems futile to try to optimize this any further...
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C INPUT PARAMETERS
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define(`rp', `%i0')
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define(`up', `%i1')
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define(`vp', `%i2')
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define(`n', `%i3')
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define(`u0', `%l0')
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define(`u1', `%l2')
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define(`u2', `%l4')
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define(`u3', `%l6')
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define(`v0', `%l1')
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define(`v1', `%l3')
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define(`v2', `%l5')
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define(`v3', `%l7')
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define(`cy',`%i4')
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define(`fanop',`fitod %f0,%f2') dnl A quasi nop running in the FA pipe
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define(`fmnop',`fmuld %f0,%f0,%f4') dnl A quasi nop running in the FM pipe
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ASM_START()
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REGISTER(%g2,#scratch)
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REGISTER(%g3,#scratch)
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PROLOGUE(mpn_add_nc)
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save %sp,-160,%sp
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fitod %f0,%f0 C make sure f0 contains small, quiet number
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subcc n,4,%g0
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bl,pn %xcc,.Loop0
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nop
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b,a L(com)
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EPILOGUE()
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PROLOGUE(mpn_add_n)
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save %sp,-160,%sp
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fitod %f0,%f0 C make sure f0 contains small, quiet number
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subcc n,4,%g0
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bl,pn %xcc,.Loop0
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mov 0,cy
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L(com):
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ldx [up+0],u0
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ldx [vp+0],v0
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add up,32,up
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ldx [up-24],u1
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ldx [vp+8],v1
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add vp,32,vp
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ldx [up-16],u2
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ldx [vp-16],v2
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ldx [up-8],u3
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ldx [vp-8],v3
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subcc n,8,n
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add u0,v0,%g1 C main add
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add %g1,cy,%g5 C carry add
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or u0,v0,%g2
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bl,pn %xcc,.Lend4567
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fanop
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b,a .Loop
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.align 16
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C START MAIN LOOP
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.Loop: andn %g2,%g5,%g2
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and u0,v0,%g3
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ldx [up+0],u0
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fanop
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C --
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or %g3,%g2,%g2
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ldx [vp+0],v0
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add up,32,up
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fanop
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C --
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srlx %g2,63,cy
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add u1,v1,%g1
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stx %g5,[rp+0]
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fanop
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C --
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add %g1,cy,%g5
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or u1,v1,%g2
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fmnop
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fanop
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C --
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andn %g2,%g5,%g2
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and u1,v1,%g3
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ldx [up-24],u1
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fanop
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C --
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or %g3,%g2,%g2
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ldx [vp+8],v1
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add vp,32,vp
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fanop
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C --
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srlx %g2,63,cy
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add u2,v2,%g1
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stx %g5,[rp+8]
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fanop
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C --
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add %g1,cy,%g5
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or u2,v2,%g2
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fmnop
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fanop
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C --
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andn %g2,%g5,%g2
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and u2,v2,%g3
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ldx [up-16],u2
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fanop
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C --
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or %g3,%g2,%g2
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ldx [vp-16],v2
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add rp,32,rp
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fanop
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C --
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srlx %g2,63,cy
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add u3,v3,%g1
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stx %g5,[rp-16]
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fanop
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C --
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add %g1,cy,%g5
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or u3,v3,%g2
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fmnop
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fanop
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C --
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andn %g2,%g5,%g2
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and u3,v3,%g3
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ldx [up-8],u3
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fanop
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C --
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or %g3,%g2,%g2
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subcc n,4,n
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ldx [vp-8],v3
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fanop
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C --
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srlx %g2,63,cy
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add u0,v0,%g1
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stx %g5,[rp-8]
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fanop
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C --
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add %g1,cy,%g5
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or u0,v0,%g2
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bge,pt %xcc,.Loop
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fanop
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C END MAIN LOOP
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.Lend4567:
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andn %g2,%g5,%g2
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and u0,v0,%g3
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or %g3,%g2,%g2
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srlx %g2,63,cy
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add u1,v1,%g1
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stx %g5,[rp+0]
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add %g1,cy,%g5
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or u1,v1,%g2
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andn %g2,%g5,%g2
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and u1,v1,%g3
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or %g3,%g2,%g2
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srlx %g2,63,cy
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add u2,v2,%g1
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stx %g5,[rp+8]
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add %g1,cy,%g5
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or u2,v2,%g2
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andn %g2,%g5,%g2
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and u2,v2,%g3
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or %g3,%g2,%g2
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add rp,32,rp
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srlx %g2,63,cy
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add u3,v3,%g1
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stx %g5,[rp-16]
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add %g1,cy,%g5
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or u3,v3,%g2
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andn %g2,%g5,%g2
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and u3,v3,%g3
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or %g3,%g2,%g2
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srlx %g2,63,cy
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stx %g5,[rp-8]
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addcc n,4,n
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bz,pn %xcc,.Lret
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fanop
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.Loop0: ldx [up],u0
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add up,8,up
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ldx [vp],v0
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add vp,8,vp
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add rp,8,rp
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subcc n,1,n
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add u0,v0,%g1
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or u0,v0,%g2
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add %g1,cy,%g5
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and u0,v0,%g3
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andn %g2,%g5,%g2
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stx %g5,[rp-8]
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or %g3,%g2,%g2
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bnz,pt %xcc,.Loop0
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srlx %g2,63,cy
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.Lret: mov cy,%i0
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ret
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restore
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EPILOGUE()
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