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f133d007f9
Old version was from 2012-05-06, 6.1.2 is from 2016-12-16 A lot of support for newer processors and speedups since then See gmp/NEWS for details
133 lines
2.8 KiB
NASM
133 lines
2.8 KiB
NASM
dnl PPC64 mpn_bdiv_dbm1c.
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dnl Copyright 2008, 2010 Free Software Foundation, Inc.
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dnl This file is part of the GNU MP Library.
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dnl
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dnl The GNU MP Library is free software; you can redistribute it and/or modify
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dnl it under the terms of either:
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dnl
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dnl * the GNU Lesser General Public License as published by the Free
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dnl Software Foundation; either version 3 of the License, or (at your
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dnl option) any later version.
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dnl
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dnl or
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dnl
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dnl * the GNU General Public License as published by the Free Software
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dnl Foundation; either version 2 of the License, or (at your option) any
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dnl later version.
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dnl
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dnl or both in parallel, as here.
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dnl
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dnl The GNU MP Library is distributed in the hope that it will be useful, but
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dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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dnl for more details.
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dnl
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dnl You should have received copies of the GNU General Public License and the
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dnl GNU Lesser General Public License along with the GNU MP Library. If not,
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dnl see https://www.gnu.org/licenses/.
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include(`../config.m4')
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C cycles/limb
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C POWER3/PPC630 6-18
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C POWER4/PPC970 8.25
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C POWER5 8.5 fluctuating as function of n % 3
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C POWER6 15
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C POWER7 4.75
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C TODO
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C * Nothing to do...
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C INPUT PARAMETERS
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define(`rp', `r3')
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define(`up', `r4')
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define(`n', `r5')
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define(`bd', `r6')
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define(`cy', `r7')
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ASM_START()
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PROLOGUE(mpn_bdiv_dbm1c)
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ld r0, 0(r4)
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rldicl. r12, r5, 0,62
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cmpldi cr6, r12, 2
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cmpldi cr7, r5, 4
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addi r5, r5, 1
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srwi r5, r5, 2
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mtctr r5
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beq cr0, L(b00)
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blt cr6, L(b01)
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beq cr6, L(b10)
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ALIGN(16)
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L(b11): mulld r5, r0, r6
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mulhdu r12, r0, r6
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ld r0, 8(r4)
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addi r4, r4, -24
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addi r3, r3, -24
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b L(3)
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ALIGN(16)
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L(b00): mulld r9, r0, r6
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mulhdu r8, r0, r6
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addi r4, r4, -16
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addi r3, r3, -16
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b L(0)
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ALIGN(16)
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L(b01): mulld r5, r0, r6
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mulhdu r12, r0, r6
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addi r3, r3, -8
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ble cr7, L(e1)
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ld r0, 8(r4)
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addi r4, r4, -8
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b L(1)
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ALIGN(16)
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L(b10): mulld r9, r0, r6
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mulhdu r8, r0, r6
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ble cr7, L(e2)
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ALIGN(16)
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L(top): subfc r11, r9, r7
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ld r10, 8(r4)
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ld r0, 16(r4)
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subfe r7, r8, r11
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std r11, 0(r3)
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mulld r5, r10, r6
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mulhdu r12, r10, r6
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L(1): mulld r9, r0, r6
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mulhdu r8, r0, r6
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subfc r11, r5, r7
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subfe r7, r12, r11
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std r11, 8(r3)
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L(0): subfc r11, r9, r7
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ld r10, 24(r4)
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ld r0, 32(r4)
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subfe r7, r8, r11
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std r11, 16(r3)
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mulld r5, r10, r6
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mulhdu r12, r10, r6
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L(3): mulld r9, r0, r6
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mulhdu r8, r0, r6
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subfc r11, r5, r7
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subfe r7, r12, r11
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std r11, 24(r3)
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addi r4, r4, 32
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addi r3, r3, 32
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bdnz L(top)
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L(e2): ld r10, 8(r4)
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mulld r5, r10, r6
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mulhdu r12, r10, r6
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subfc r11, r9, r7
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subfe r7, r8, r11
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std r11, 0(r3)
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L(e1): subfc r11, r5, r7
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std r11, 8(r3)
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subfe r3, r12, r11
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blr
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EPILOGUE()
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