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intel_extreme: fix warnings on 64bit.

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This commit is contained in:
Adrien Destugues 2014-10-19 11:38:27 +00:00
parent 40afabe6a3
commit 13af65c402
5 changed files with 21 additions and 18 deletions
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2
headers/private/graphics/intel_extreme/intel_extreme.h
View File

@ -185,7 +185,7 @@ struct intel_shared_info {
int32 overlay_channel_used;
bool overlay_active;
uint32 overlay_token;
uintptr_t overlay_token;
phys_addr_t physical_overlay_registers;
uint32 overlay_offset;

3
src/add-ons/accelerants/intel_extreme/accelerant.cpp
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@ -223,7 +223,8 @@ intel_init_accelerant(int device)
}
TRACE("head detected: %#x\n", gInfo->head_mode);
TRACE("adpa: %08lx, dova: %08lx, dovb: %08lx, lvds: %08lx\n",
TRACE("adpa: %08" B_PRIx32 ", dova: %08" B_PRIx32 ", dovb: %08" B_PRIx32
", lvds: %08" B_PRIx32 "\n",
read32(INTEL_DISPLAY_A_ANALOG_PORT),
read32(INTEL_DISPLAY_A_DIGITAL_PORT),
read32(INTEL_DISPLAY_B_DIGITAL_PORT),

4
src/add-ons/accelerants/intel_extreme/engine.cpp
View File

@ -129,7 +129,7 @@ QueueCommands::MakeSpace(uint32 size)
if (fRingBuffer.space_left < size) {
if (system_time() > start + 1000000LL) {
ERROR("engine stalled, head %lx\n", head);
ERROR("engine stalled, head %" B_PRIx32 "\n", head);
break;
}
spin(10);
@ -256,7 +256,7 @@ intel_wait_engine_idle(void)
if (system_time() > start + 1000000LL) {
// the engine seems to be locked up!
ERROR("engine locked up, head %lx!\n", head);
ERROR("engine locked up, head %" B_PRIx32 "!\n", head);
break;
}

23
src/add-ons/accelerants/intel_extreme/mode.cpp
View File

@ -190,14 +190,14 @@ get_pll_limits(pll_limits &limits)
limits = kLimits;
}
TRACE("PLL limits, min: p %lu (p1 %lu, p2 %lu), n %lu, m %lu "
"(m1 %lu, m2 %lu)\n", limits.min.post, limits.min.post1,
limits.min.post2, limits.min.n, limits.min.m, limits.min.m1,
limits.min.m2);
TRACE("PLL limits, max: p %lu (p1 %lu, p2 %lu), n %lu, m %lu "
"(m1 %lu, m2 %lu)\n", limits.max.post, limits.max.post1,
limits.max.post2, limits.max.n, limits.max.m, limits.max.m1,
limits.max.m2);
TRACE("PLL limits, min: p %" B_PRIu32 " (p1 %" B_PRIu32 ", p2 %" B_PRIu32
"), n %" B_PRIu32 ", m %" B_PRIu32 " (m1 %" B_PRIu32 ", m2 %" B_PRIu32
")\n", limits.min.post, limits.min.post1, limits.min.post2,
limits.min.n, limits.min.m, limits.min.m1, limits.min.m2);
TRACE("PLL limits, max: p %" B_PRIu32 " (p1 %" B_PRIu32 ", p2 %" B_PRIu32
"), n %" B_PRIu32 ", m %" B_PRIu32 " (m1 %" B_PRIu32 ", m2 %" B_PRIu32
")\n", limits.max.post, limits.max.post1, limits.max.post2,
limits.max.n, limits.max.m, limits.max.m1, limits.max.m2);
}
@ -283,8 +283,9 @@ compute_pll_divisors(const display_mode &current, pll_divisors& divisors,
divisors = bestDivisors;
TRACE("%s: found: %g MHz, p = %lu (p1 = %lu, p2 = %lu), n = %lu, m = %lu "
"(m1 = %lu, m2 = %lu)\n", __func__,
TRACE("%s: found: %g MHz, p = %" B_PRIu32 " (p1 = %" B_PRIu32 ", p2 = %"
B_PRIu32 "), n = %" B_PRIu32 ", m = %" B_PRIu32 " (m1 = %" B_PRIu32
", m2 = %" B_PRIu32 ")\n", __func__,
((referenceClock * divisors.m) / divisors.n) / divisors.post,
divisors.post, divisors.post1, divisors.post2, divisors.n,
divisors.m, divisors.m1, divisors.m2);
@ -600,7 +601,7 @@ create_mode_list(void)
// vs the HEAD_MODE_ in head_mode
for (uint32 i = 0; i < sizeof(gpioPinMap) / sizeof(gpioPinMap[0]); i++) {
i2c_bus bus;
bus.cookie = (void*)gpioPinMap[i].pin;
bus.cookie = (void*)(uintptr_t)gpioPinMap[i].pin;
bus.set_signals = &set_i2c_signals;
bus.get_signals = &get_i2c_signals;
ddc2_init_timing(&bus);

7
src/add-ons/accelerants/intel_extreme/overlay.cpp
View File

@ -635,9 +635,10 @@ intel_configure_overlay(overlay_token overlayToken,
+ (view->width << 1) + 0x1f) >> 5)
- (overlay->buffer_offset >> 5) - 1) << 2;
} else {
registers->source_bytes_per_row_rgb = ((((overlay->buffer_offset
+ (view->width << 1) + 0x3f) >> 6)
- (overlay->buffer_offset >> 6) << 1) - 1) << 2;
int yaddress = overlay->buffer_offset;
int yswidth = view->width << 1;
registers->source_bytes_per_row_rgb = (((((yaddress
+ yswidth + 0x3f) >> 6) - (yaddress >> 6)) << 1) - 1) << 2;
}
// horizontal scaling