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riscv: cleanup architecture macro checks

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* We really should get out of the habbit of making up
  our own architecture defines.
* __riscv with an additional  __riscv_xlen is the
  standard that developed... let's just roll with it.

Change-Id: Ieb777d48340ae25a6d66f66133afa0ec5c6da9b6
Reviewed-on: https://review.haiku-os.org/c/haiku/+/4402
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: waddlesplash <waddlesplash@gmail.com>
This commit is contained in:
Alexander von Gluck IV 2021-08-28 09:11:57 -05:00 committed by waddlesplash
parent f40bacae87
commit 372b901dfe
6 changed files with 19 additions and 8 deletions
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12
headers/config/HaikuConfig.h
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@ -61,11 +61,21 @@
# define __HAIKU_ARCH_ABI "arm64"
# define __HAIKU_ARCH_ARM64 1
# define __HAIKU_ARCH_BITS 64
#elif defined(__riscv64__) || (defined(__riscv) && __riscv_xlen == 64)
#elif (defined(__riscv) && __riscv_xlen == 32)
# define __HAIKU_ARCH riscv32
# define __HAIKU_ARCH_ABI "riscv32"
# define __HAIKU_ARCH_RISCV32 1
# define __HAIKU_ARCH_BITS 32
#elif (defined(__riscv) && __riscv_xlen == 64)
# define __HAIKU_ARCH riscv64
# define __HAIKU_ARCH_ABI "riscv64"
# define __HAIKU_ARCH_RISCV64 1
# define __HAIKU_ARCH_BITS 64
#elif (defined(__riscv) && __riscv_xlen == 128)
# define __HAIKU_ARCH riscv128
# define __HAIKU_ARCH_ABI "riscv128"
# define __HAIKU_ARCH_RISCV128 1
# define __HAIKU_ARCH_BITS 128
#elif defined(__sparc64__)
# define __HAIKU_ARCH sparc64
# define __HAIKU_ARCH_ABI "sparc"

2
headers/os/kernel/debugger.h
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@ -35,7 +35,7 @@
typedef struct mipsel_debug_cpu_state debug_cpu_state;
#elif defined(__arm__)
typedef struct arm_debug_cpu_state debug_cpu_state;
#elif defined(__RISCV__) || defined(__riscv64__)
#elif (defined(__riscv) && __riscv_xlen == 64)
typedef struct riscv64_debug_cpu_state debug_cpu_state;
#elif defined(__sparc64__)
typedef struct sparc_debug_cpu_state debug_cpu_state;

2
headers/posix/fenv.h
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@ -11,7 +11,7 @@
# include <arch/arm64/fenv.h>
#elif defined(__POWERPC__)
# include <arch/ppc/fenv.h>
#elif defined(__riscv64__)
#elif (defined(__riscv) && __riscv_xlen == 64)
# include <arch/riscv64/fenv.h>
#elif defined(__sparc__)
# include <arch/sparc64/fenv.h>

4
headers/private/kernel/arch/riscv64/arch_kernel.h
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@ -18,7 +18,7 @@
#define KERNEL_LOAD_BASE_64_BIT 0xffffffc000000000
#if defined(__riscv64__)
#if (defined(__riscv) && __riscv_xlen == 64)
// Base of the kernel address space.
#define KERNEL_BASE 0xffffffc000000000
@ -35,7 +35,7 @@
#define USER_STACK_REGION (USER_BASE + 0x3000000000)
#define USER_STACK_REGION_SIZE ((USER_TOP - USER_STACK_REGION) + 1)
#else /* ! __riscv64__ */
#else /* ! riscv64 */
#warning Unknown RISC-V Architecture!
#endif

5
src/libs/compat/freebsd_network/compat/sys/param.h
View File

@ -53,7 +53,8 @@
#define ALIGNED_POINTER(p, t) ((((uintptr_t)(p)) & (sizeof (t) - 1)) == 0)
#elif defined(__arm__)
#define ALIGNED_POINTER(p, t) ((((unsigned)(p)) & (sizeof(t) - 1)) == 0)
#elif defined(__mips__) || defined(__sparc__) || defined(__riscv64__) \
#elif defined(__mips__) || defined(__sparc__) \
|| (defined(__riscv) && __riscv_xlen == 64) \
|| defined(__aarch64__) || defined(__arm64__)
#define ALIGNED_POINTER(p, t) ((((unsigned long)(p)) & (sizeof (t) - 1)) == 0)
#else
@ -62,7 +63,7 @@
/* defined in arch_cpu.h which we can't include here as it's C++ */
#if defined(__x86_64__) || defined(__i386__) || defined(__arm__) \
|| defined(__sparc__) || defined(__riscv64__) \
|| defined(__sparc__) || defined(__riscv) \
|| defined(__aarch64__) || defined(__arm64__)
#define CACHE_LINE_SIZE 64
#elif defined(__powerpc__)

2
src/system/libroot/posix/stdlib/strtod.c
View File

@ -127,7 +127,7 @@
defined(__sparc64__) || defined(__powerpc__) || defined(__POWERPC__) || \
defined(__m68k__) || defined(__M68K__) || defined(__arm__) || \
defined(__mipsel__) || defined(__MIPSEL__) || defined(__x86_64__) || \
defined(__riscv64__) || defined(__aarch64__) || defined(__arm64__)
defined(__riscv) || defined(__aarch64__) || defined(__arm64__)
# include <sys/types.h>
# if BYTE_ORDER == BIG_ENDIAN
# define IEEE_BIG_ENDIAN