Adrien Destugues 168aff90a7 intel_extreme: program the DPLL_SEL register on SandyBridge
We need to assign PLLs to pipes and transcoders. The assignments on
previous generations were fixed, but now it's up to us to set it up.

Do the simplest thing for now: assign PLL1 to pipe A and PLL2 to pipe B.
2020-03-08 16:01:43 +01:00
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2019-12-05 18:28:12 +01:00
2014-10-19 12:51:53 +00:00