X512 4a32f48e70 kernel/arch/thread: implement for riscv64
Change-Id: I3effa598626b32c29606299cd0edee390d430baf
Reviewed-on: https://review.haiku-os.org/c/haiku/+/4066
Reviewed-by: Alex von Gluck IV <kallisti5@unixzen.com>
2021-08-06 15:01:52 +00:00

25 lines
514 B
C

/*
* Copyright 2018-2019 Haiku, Inc. All Rights Reserved.
* Distributed under the terms of the MIT License.
*/
#ifndef _ARCH_RISCV64_SIGNAL_H_
#define _ARCH_RISCV64_SIGNAL_H_
/*
* Architecture-specific structure passed to signal handlers
*/
// TODO: gcc7's RISCV doesn't seem real keen on identifying 32 vs 64 yet.
#if defined(__RISCV64__) || defined(__RISCV__)
struct vregs {
ulong x[31];
ulong pc;
double f[32];
ulong fcsr;
};
#endif /* defined(__RISCV64__) */
#endif /* _ARCH_RISCV64_SIGNAL_H_ */