Bill Randle 7aedc8b3e1 edid_raw: Correct missing bitfield ...

* edid1_detailed_timing_raw was missing
  a field which threw off the sync bits.
* The result was the monitor will receive
  a different sync polarity than it requested.
  Most monitors handle this, but it is still
  a bug

2013-01-27 12:18:49 -06:00

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benaphore.h

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bendian_bitfield.h

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compute_display_timing.h

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create_display_modes.h

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ddc.h

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debug_ext.h

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dp_raw.h

radeon_hd: Add DP link_train_ce

2012-08-05 00:01:43 -05:00

dp.h

radeon_hd: display port improvements

2012-08-05 12:15:35 -05:00

edid_raw.h

edid_raw: Correct missing bitfield

2013-01-27 12:18:49 -06:00

edid.h

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i2c.h

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lendian_bitfield.h

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log_coll.h

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memory_manager.h

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validate_display_mode.h

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video_configuration.h

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