mirror of
https://review.haiku-os.org/haiku
synced 2025-02-15 10:08:36 +01:00
629f071bb9
Also increase MSI message data size to 32 bits according to PCIe spec. Remove 0xff check for MSI interrupts because it is potentially valid interrupt vector number. Reject 0xff only for legacy pin interrupts. - MSI-X supports up to 2048 interrupts per device that do not fit to `uint8`. - Non-x86 systems may use separate interrupt vector ranges for hard-wired interrupts and MSI interrupts so `uint8` is not enough to represent all of them. Change-Id: Iaf9ffb197ec23db0f97ffe3ea756d28d7bfc8705 Reviewed-on: https://review.haiku-os.org/c/haiku/+/7433 Reviewed-by: waddlesplash <waddlesplash@gmail.com> Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
31 lines
917 B
C
31 lines
917 B
C
#ifndef _KERNEL_ARCH_x86_MSI_H
|
|
#define _KERNEL_ARCH_x86_MSI_H
|
|
|
|
#include <arch/generic/msi.h>
|
|
|
|
// address register
|
|
#define MSI_ADDRESS_BASE 0xfee00000
|
|
#define MSI_DESTINATION_ID_SHIFT 12
|
|
#define MSI_REDIRECTION 0x00000008
|
|
#define MSI_NO_REDIRECTION 0x00000000
|
|
#define MSI_DESTINATION_MODE_LOGICAL 0x00000004
|
|
#define MSI_DESTINATION_MODE_PHYSICAL 0x00000000
|
|
|
|
// data register
|
|
#define MSI_TRIGGER_MODE_EDGE 0x00000000
|
|
#define MSI_TRIGGER_MODE_LEVEL 0x00008000
|
|
#define MSI_LEVEL_DEASSERT 0x00000000
|
|
#define MSI_LEVEL_ASSERT 0x00004000
|
|
#define MSI_DELIVERY_MODE_FIXED 0x00000000
|
|
#define MSI_DELIVERY_MODE_LOWEST_PRIO 0x00000100
|
|
#define MSI_DELIVERY_MODE_SMI 0x00000200
|
|
#define MSI_DELIVERY_MODE_NMI 0x00000400
|
|
#define MSI_DELIVERY_MODE_INIT 0x00000500
|
|
#define MSI_DELIVERY_MODE_EXT_INT 0x00000700
|
|
|
|
|
|
void msi_assign_interrupt_to_cpu(uint32 irq, int32 cpu);
|
|
|
|
|
|
#endif // _KERNEL_ARCH_x86_MSI_H
|