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Using the page attribute table to set the memory type on a per page mapping basis is the more modern and flexible approach to physical memory type handling compared to using MTRRs. Most of the needed infrastructure was already in place, as setting the page table entry attributes was already done for uncachable and write-back memory types. Using the PAT now also allows to set the last remaining memory type of write-combining through the PTE flags. The PAT is configured to have entry 4 mean write-combining and the PAT bit in the PTE is set to point to that. When PAT is supported and not disabled, MTRRs are completely ignored and left as set up by the system firmware, where the basic uncachable and RAM ranges are supposed to be set up. These configurations are then overridden by the PTE flags as needed. Change-Id: I0a74b3fc7d3ba9fa384251290ce41621b69d3a02 Reviewed-on: https://review.haiku-os.org/c/haiku/+/8340 Reviewed-by: waddlesplash <waddlesplash@gmail.com>