Bill Randle 7aedc8b3e1 edid_raw: Correct missing bitfield ...

* edid1_detailed_timing_raw was missing
  a field which threw off the sync bits.
* The result was the monitor will receive
  a different sync polarity than it requested.
  Most monitors handle this, but it is still
  a bug

2013-01-27 12:18:49 -06:00

..

benaphore.h

…

bendian_bitfield.h

…

compute_display_timing.h

…

create_display_modes.h

…

ddc.h

…

debug_ext.h

…

dp_raw.h

radeon_hd: Add DP link_train_ce

2012-08-05 00:01:43 -05:00

dp.h

radeon_hd: display port improvements

2012-08-05 12:15:35 -05:00

edid_raw.h

edid_raw: Correct missing bitfield

2013-01-27 12:18:49 -06:00

edid.h

…

i2c.h

…

lendian_bitfield.h

…

log_coll.h

…

memory_manager.h

…

validate_display_mode.h

* Added helper functions for the "propose mode" accelerant hook.

2011-09-11 18:29:50 +00:00

video_configuration.h

Include file style cleanup, no functional change

2011-12-09 21:26:41 -06:00