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88eb0056ca8ad0a3c7086e9dc97d384aab21ed23
haikuports/net-libs/nodejs/patches/nodejs_x86-20.15.1.patchset
Schrijvers Luc 88eb0056ca nodejs20, fixes for 32bit build (#12479) 
Co-authored-by: Oscar Lesta <oscar.lesta@gmail.com>
2025-06-06 07:57:50 +00:00

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From 49a0bf642387802b0842409bbd118d11ad1f71cd Mon Sep 17 00:00:00 2001
From: Begasus <begasus@gmail.com>
Date: Thu, 5 Jun 2025 12:06:13 +0200
Subject: Fix up type-mismatch in function declarations
Co-authored-by: Oscar Lesta <oscar.lesta@gmail.com>
diff --git a/deps/v8/src/wasm/baseline/ia32/liftoff-assembler-ia32.h b/deps/v8/src/wasm/baseline/ia32/liftoff-assembler-ia32.h
index c3ecfca..df0f88d 100644
--- a/deps/v8/src/wasm/baseline/ia32/liftoff-assembler-ia32.h
+++ b/deps/v8/src/wasm/baseline/ia32/liftoff-assembler-ia32.h
@@ -43,7 +43,7 @@ static constexpr LiftoffRegList kByteRegs =
LiftoffRegList::FromBits<RegList{eax, ecx, edx}.bits()>();
inline void Load(LiftoffAssembler* assm, LiftoffRegister dst, Register base,
- int32_t offset, ValueKind kind) {
+ uintptr_t offset, ValueKind kind) {
Operand src(base, offset);
switch (kind) {
case kI32:
@@ -70,7 +70,7 @@ inline void Load(LiftoffAssembler* assm, LiftoffRegister dst, Register base,
}
}
-inline void Store(LiftoffAssembler* assm, Register base, int32_t offset,
+inline void Store(LiftoffAssembler* assm, Register base, uintptr_t offset,
LiftoffRegister src, ValueKind kind) {
Operand dst(base, offset);
switch (kind) {
@@ -419,7 +419,7 @@ void LiftoffAssembler::StoreTaggedPointer(Register dst_addr,
}
void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr,
- Register offset_reg, uint32_t offset_imm,
+ Register offset_reg, uintptr_t offset_imm,
LoadType type, uint32_t* protected_load_pc,
bool /* is_load_mem */, bool /* i64_offset */,
bool needs_shift) {
@@ -499,7 +499,7 @@ void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr,
}
void LiftoffAssembler::Store(Register dst_addr, Register offset_reg,
- uint32_t offset_imm, LiftoffRegister src,
+ uintptr_t offset_imm, LiftoffRegister src,
StoreType type, LiftoffRegList pinned,
uint32_t* protected_store_pc,
bool /* is_store_mem */, bool /* i64_offset */) {
@@ -568,7 +568,7 @@ void LiftoffAssembler::Store(Register dst_addr, Register offset_reg,
}
void LiftoffAssembler::AtomicLoad(LiftoffRegister dst, Register src_addr,
- Register offset_reg, uint32_t offset_imm,
+ Register offset_reg, uintptr_t offset_imm,
LoadType type, LiftoffRegList /* pinned */,
bool /* i64_offset */) {
if (type.value() != LoadType::kI64Load) {
@@ -588,7 +588,7 @@ void LiftoffAssembler::AtomicLoad(LiftoffRegister dst, Register src_addr,
}
void LiftoffAssembler::AtomicStore(Register dst_addr, Register offset_reg,
- uint32_t offset_imm, LiftoffRegister src,
+ uintptr_t offset_imm, LiftoffRegister src,
StoreType type, LiftoffRegList pinned,
bool /* i64_offset */) {
DCHECK_NE(offset_reg, no_reg);
@@ -929,7 +929,7 @@ inline void AtomicBinop64(LiftoffAssembler* lasm, Binop op, Register dst_addr,
} // namespace liftoff
void LiftoffAssembler::AtomicAdd(Register dst_addr, Register offset_reg,
- uint32_t offset_imm, LiftoffRegister value,
+ uintptr_t offset_imm, LiftoffRegister value,
LiftoffRegister result, StoreType type,
bool /* i64_offset */) {
if (type.value() == StoreType::kI64Store) {
@@ -943,7 +943,7 @@ void LiftoffAssembler::AtomicAdd(Register dst_addr, Register offset_reg,
}
void LiftoffAssembler::AtomicSub(Register dst_addr, Register offset_reg,
- uint32_t offset_imm, LiftoffRegister value,
+ uintptr_t offset_imm, LiftoffRegister value,
LiftoffRegister result, StoreType type,
bool /* i64_offset */) {
if (type.value() == StoreType::kI64Store) {
@@ -956,7 +956,7 @@ void LiftoffAssembler::AtomicSub(Register dst_addr, Register offset_reg,
}
void LiftoffAssembler::AtomicAnd(Register dst_addr, Register offset_reg,
- uint32_t offset_imm, LiftoffRegister value,
+ uintptr_t offset_imm, LiftoffRegister value,
LiftoffRegister result, StoreType type,
bool /* i64_offset */) {
if (type.value() == StoreType::kI64Store) {
@@ -970,7 +970,7 @@ void LiftoffAssembler::AtomicAnd(Register dst_addr, Register offset_reg,
}
void LiftoffAssembler::AtomicOr(Register dst_addr, Register offset_reg,
- uint32_t offset_imm, LiftoffRegister value,
+ uintptr_t offset_imm, LiftoffRegister value,
LiftoffRegister result, StoreType type,
bool /* i64_offset */) {
if (type.value() == StoreType::kI64Store) {
@@ -984,7 +984,7 @@ void LiftoffAssembler::AtomicOr(Register dst_addr, Register offset_reg,
}
void LiftoffAssembler::AtomicXor(Register dst_addr, Register offset_reg,
- uint32_t offset_imm, LiftoffRegister value,
+ uintptr_t offset_imm, LiftoffRegister value,
LiftoffRegister result, StoreType type,
bool /* i64_offset */) {
if (type.value() == StoreType::kI64Store) {
@@ -998,7 +998,7 @@ void LiftoffAssembler::AtomicXor(Register dst_addr, Register offset_reg,
}
void LiftoffAssembler::AtomicExchange(Register dst_addr, Register offset_reg,
- uint32_t offset_imm,
+ uintptr_t offset_imm,
LiftoffRegister value,
LiftoffRegister result, StoreType type,
bool /* i64_offset */) {
@@ -1013,7 +1013,7 @@ void LiftoffAssembler::AtomicExchange(Register dst_addr, Register offset_reg,
}
void LiftoffAssembler::AtomicCompareExchange(
- Register dst_addr, Register offset_reg, uint32_t offset_imm,
+ Register dst_addr, Register offset_reg, uintptr_t offset_imm,
LiftoffRegister expected, LiftoffRegister new_value, LiftoffRegister result,
StoreType type, bool /* i64_offset */) {
// We expect that the offset has already been added to {dst_addr}, and no
diff --git a/src/node_process_object.cc b/src/node_process_object.cc
index 274f1f0..bae5e3d 100644
--- a/src/node_process_object.cc
+++ b/src/node_process_object.cc
@@ -75,7 +75,7 @@ static void DebugPortSetter(Local<Name> property,
static void GetParentProcessId(Local<Name> property,
const PropertyCallbackInfo<Value>& info) {
- info.GetReturnValue().Set(uv_os_getppid());
+ info.GetReturnValue().Set((int32_t)uv_os_getppid());
}
MaybeLocal<Object> CreateProcessObject(Realm* realm) {
--
2.48.1
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