Verilator: Fix incorrect static -lm in makefile include

This commit is contained in:
Alexander von Gluck IV
2014-10-23 19:20:16 +00:00
parent 09c6f4743e
commit 057164b245
2 changed files with 43 additions and 1 deletions

View File

@@ -50,3 +50,45 @@ index 7c31676..85cf301 100644
--
1.8.3.4
From 4d07f6a4a4db515074356809f3f1d21d1d15b4a0 Mon Sep 17 00:00:00 2001
From: Alexander von Gluck IV <kallisti5@unixzen.com>
Date: Thu, 23 Oct 2014 19:08:44 +0000
Subject: [PATCH] Verilator: Fix hardcoded libmath in verilated.mk
---
include/verilated.mk.in | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/verilated.mk.in b/include/verilated.mk.in
index 87feb6d..9cedcba 100644
--- a/include/verilated.mk.in
+++ b/include/verilated.mk.in
@@ -108,7 +108,7 @@ endif
ifeq ($(VM_SP),1)
CPPFLAGS += -I$(SYSTEMPERL_INCLUDE) -DSYSTEMPERL
VPATH += $(SYSTEMPERL_INCLUDE)
- LIBS += -lm -lstdc++
+ LIBS += -lstdc++
VK_CLASSES_SP = $(addsuffix .sp, $(VM_CLASSES))
@@ -129,14 +129,14 @@ endif
##### SystemC w/o SystemPerl builds
ifeq ($(VM_SC),1)
- LIBS += -lm -lstdc++
+ LIBS += -lstdc++
endif
#######################################################################
##### C/H builds
ifeq ($(VM_PCLI),1)
- LIBS += -lm -lstdc++
+ LIBS += -lstdc++
endif
#######################################################################
--
1.8.3.4

View File

@@ -5,7 +5,7 @@ Verilator is the fastest free Verilog HDL simulator, and beats most commercial s
HOMEPAGE="http://www.veripool.org/wiki/verilator"
SRC_URI="http://www.veripool.org/ftp/verilator-3.864.tgz"
CHECKSUM_SHA256="f6734c2aa33946357d5abfd9211b4206297f9adf07dfc3186cbbba0d8c8842af"
REVISION="1"
REVISION="2"
ARCHITECTURES="x86_gcc2 x86"
SECONDARY_ARCHITECTURES="x86"